The present invention relates to a method of manufacturing a semiconductor device and the semiconductor device, and particularly to a technology which is effective when applied to a semiconductor device in which a plurality of field effect transistors different in gate length and layout density are produced in the same substrate.
For example, Japanese Unexamined Patent Publication No. Hei 5 (1993)-326513 (Patent Document 1) discloses a technique which forms a SiO2 spacer layer by dry etching and then removes a thermal oxidation SiO2 film remaining over a substrate surface by wet etching to thereby inhibit damage to the substrate surface.
Also, Japanese Unexamined Patent Publication No. 2005-5508 (Patent Document 2) discloses a technique which dry-etches a sidewall spacer formation layer to form sidewall spacers and then removes the sidewall spacers in a low-voltage-transistor formation region by wet etching.